![]() Single Transaction Translator (TT) architecture.− Support downstream port configuration by reading external EEPROM − Support customized PID, VID by reading external EEPROM − Backward compatible to USB specification Revision 1.1 − 1 control pipe (endpoint 0, 64-byte data payload) and 1 interrupt pipe (endpoint 1, 1-byte data payload) ![]() − Downstream ports support HS, FS, and low-speed (LS) traffic − Upstream port supports both high-speed (HS) and full-speed (FS) traffic
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